SlimeASM — z/Architecture HLASM + x64 MASM → Java bit-exact transpiler

Key measurements (2026-05-10 / 2026-05-11)

Market context — where legacy assembler still lives

Banks (IBM mainframe)	Core banking, credit, settlement. Typical mix is COBOL 80-95% / HLASM 5-15%, but the HLASM portion holds 30-50% of CPU time. Heirloom / Astadia rewrite HLASM line-by-line to C/C++ at per-LOC pricing in the thousands-to-tens-of-thousands USD range.
Insurance / pension	Pension calculation and policy management HLASM hot-loops. AP / ZAP / packed decimal high-speed decimal arithmetic mixed with DCB file I/O; many systems unchanged for 20-30 years.
Defense / aerospace	x86 16-bit / 32-bit / 64-bit MASM. Embedded Win32 DLLs, radar signal processing, simulators. Closed binaries built with Visual Studio + MASM (ml64) and frozen.
Manufacturing / embedded	Windows-based instrumentation and line control. x64 MASM hot-loops trapped inside DLLs whose maintenance vendor and source are no longer available.
Competitive landscape	Heirloom Computing / Modern Systems / Micro Focus and other COBOL migration tools either do not support HLASM, or charge separately per LOC. SlimeASM is WASM-converter tool licensing only; the produced Java is a perpetual customer asset.

Supported features

z/Architecture HLASM (Phase A → C-3.7, 49 samples all PASS)

Integer (Phase A)	L / LR / LA / LH / LM / ST / STH / STM / A / AR / AH / S / SR / SH / M / MR / MH / D / DR / C / CR / CH / CL / CLR / CLC / B / BR / BC / BE / BNE / BL / BH / BCT / BCTR / BAS / BAL / MVC / MVI / XC / OC / NC
Decimal (Phase B-1)	AP / SP / MP / DP / ZAP / CP / CVB / CVD — BigDecimal-backed, faithfully reproducing IBM mainframe 4-bit packed decimal.
HFP (Phase B-2)	LE / LD / AE / AD / SE / SD / ME / MD / DE / DD short and long forms — IBM 4-bit-exponent hex float ↔ IEEE 754 bidirectional bit-exact.
OS macro shim	GETMAIN / FREEMAIN / ABEND / SVC / RETURN / OPEN / CLOSE / GET / PUT / READ / WRITE / DCB — z/OS macros translated to POSIX/Java shims.
Conversion (Phase B-3)	PACK / UNPK (zoned ↔ packed) / TR / TRT (Translate / Translate-and-Test, arbitrary 256-byte tables) / ED / EDMK (Edit mask, digit selectors + verbatim pass-through).
SIMD (Phase C / C-3.5)	z/Arch vector regs V0..V31 — VL / VST / VA / VS / VLR / VLEG / VSTEG / VC / VCE / VPERM / VSEL (lane-wise compare-equal / byte permute / select).
Control (Phase C-3.6)	EX (Execute trick, functional via saved-PC stack) / SAR / EAR / CPYA (AR mode) / SAM24 / SAM31 / SAM64 / BSM / BASSM (AMODE switch + real Branch-and-Set-Mode).
File I/O (Phase C-3.7)	DCB DDNAME=... DSORG=PS MACRF=GM / PM EODAD=... + OPEN / GET / PUT / CLOSE + real EODAD wiring (EOF jumps to the named label). Echo loop runs end-to-end on stdin/stdout.

Windows x64 MASM (ml64) (Phase A, 5 samples all PASS)

Instructions (integer)	mov / lea / xchg / push / pop / add / sub / inc / dec / imul (2-op) / idiv (1-op) / neg / and / or / xor / not / shl / shr / sar / cmp / test / jmp / je / jne / jl / jle / jg / jge / loop / call / ret
Registers	RAX/RCX/RDX/RBX/RSP/RBP/RSI/RDI/R8..R15 plus all sub-register names (eax/ax/al/r8d/r8w/r8b etc.). 32-bit writes zero-extend; 16/8-bit writes preserve upper bits — bit-exact x86 semantics.
Data definitions	db / dw / dd / dq + equ $ - label (size). Data segments are reproduced as a synthetic linear address space (base 0x1000, 16-byte aligned).
Sections	option casemap:none / includelib / extern / .code / .data / proc / endp / end
Win64 ABI shim	GetStdHandle / WriteFile (RCX=hFile, RDX=lpBuffer, R8=nBytes, R9=lpWritten, [rsp+32]=lpOverlapped) / ExitProcess translated to System.out.write. 32-byte shadow space + pushed args honored.

Translation example — z/Arch HLASM echo loop (Phase C-3.7)

Classic shape: DCB EODAD catches stdin EOF, PUT mirrors the record to output:

* SlimeASM sample 49 — echo until EOF using DCB EODAD= branch.
ECHOL    CSECT
         OPEN  (INDCB,(INPUT),OUTDCB,(OUTPUT))
LOOP     GET   INDCB,RECBUF
         PUT   OUTDCB,RECBUF
         B     LOOP
EOFRTN   DS    0H
         CLOSE (INDCB,,OUTDCB)
         WTO   'ECHO_LOOP_OK'
         BR    14
INDCB    DCB   DDNAME=DDIN,DSORG=PS,MACRF=GM,EODAD=EOFRTN
OUTDCB   DCB   DDNAME=DDOUT,DSORG=PS,MACRF=PM
RECBUF   DS    CL80
         END   ECHOL

The S6 emitter reads the EODAD attribute and translates the EOF path of GET into a direct PC jump to EOFRTN. With empty stdin the run falls straight to EOFRTN → CLOSE → WTO and PASSes bit-exact.

Translation example — x64 MASM integer hot-loop (Phase A)

Win64 ABI calling WriteFile to print "SUM=15" (1+2+3+4+5):

; SlimeASM-x86 sample 03 — loop sum 1..5 -> 15, print "SUM=15".
.code
main proc
    xor  rax, rax              ; sum = 0
    mov  rcx, 5                ; counter
sum_loop:
    add  rax, rcx
    loop sum_loop              ; dec rcx; jnz sum_loop  → rax = 15

    mov  rcx, 10
    xor  rdx, rdx
    idiv rcx                   ; rax=tens, rdx=ones
    add  al,  '0'
    add  dl,  '0'
    mov  buf,   al
    mov  buf+1, dl

    ; ... GetStdHandle / WriteFile prefix / WriteFile buf ...
    xor  rcx, rcx
    call ExitProcess
main endp
end

// Generated Java (deterministic, byte-exact)
case 1: R[1] = 5L; pc++; break;                   // mov rcx, 5
case 2: R[0] = R[0] + R[1];                       // add rax, rcx
        ZF = (R[0] == 0) ? 1 : 0;
        SF = (R[0] < 0)  ? 1 : 0; pc++; break;
case 3: R[1] = R[1] - 1;                          // loop sum_loop
        pc = (R[1] != 0) ? 2 : pc + 1; break;

Audit fitness (finance / defense)

• Bit-exactSame .s / .asm input → same sha256 Java output. Fully deterministic for HFP / packed decimal / vector / x86 sub-register semantics.
• Java round-tripemit → javac → java → stdout diffed against expected, HLASM 49/49 + x64 MASM 5/5 PASS (2026-05-10/11 baseline). All 5 axes auto-regressed by s9_bench/bench.py.
• Mutation detectSOH (0x01) injected at random offsets → tokenizer rejects. HLASM 49/49 / x64 MASM 5/5 detect 100% of mutations.
• DeterminismTwo emit runs on identical input produce byte-equal Java per sample.
• Audit chainIntegrates with the SlimeNENC shared S7 base — SHA-256 monotonic chain.
• Build-time LLMLLM only at rule-construction time. Runtime is deterministic rule-based — the basis of the 99.9995% claim.

Position in the SlimeNENC family

• Land-and-expand finisher for SlimeCOBOLWhen HLASM hot-loops are left behind in a bank COBOL migration, per-LOC re-dependence on Heirloom et al. creeps back in. Bundling SlimeASM completes the “one-vendor migration project” story.
• Trio with SlimeJCLCOBOL (body) + JCL (control) + ASM (hot-loop) is the three-piece set that finishes IBM z/OS batch migrations.
• Horizontal expansion to x64The Slot IR + S2-S9 base validated on z/Arch is being expanded to Windows x64 (Phase A complete) → Linux x86_64 NASM/GAS (Phase B) → AVX-512 / AMX (Phase C) → 16-bit DOS / self-modifying code support (Phase D).
• Independent SKULike every other SlimeNENC product, an independent SKU. Parallelization (PSDP) is not bundled.

License model

Charged	WASM/WASI converter tool (developer side)
Not charged	The produced Java sources (customer asset, perpetual deployment)
Method	Ed25519 144B signed license + 3-hop air-gap activation (finance / defense audit ready)
Parallelization (PSDP)	Not included. See the independent PSDP SKU under SlimeNENC.

Related materials

• Technical overviewSlimeNENC Technical Overview (assembler chapter being prepared)
• Patent applicationJP application 2026-046620 v15b, claims 11 / 14d, explicitly target legacy-language dialect handling for COBOL / MUMPS / PL/I / RPG / assembler.
• Sister productsSlimeCOBOL / SlimeJCL / SlimePL/I / SlimeRPG / SlimeMUMPS share the S2-S5 / S7-S9 base.
• BenchmarksS9 bench harness (5 axes of correctness), s9_bench/bench.py auto-regresses HLASM 245/245 + x64 MASM 25/25.

ASM PoC / Request Materials Back to SlimeNENC family SlimeCOBOL SlimeJCL